BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Electratraining//Eventos//ES
CALSCALE:GREGORIAN
METHOD:PUBLISH
BEGIN:VEVENT
UID:evento-19866-20261028@electratraining.org
DTSTAMP:20261027T235421Z
DTSTART;VALUE=DATE:20261028
DTEND;VALUE=DATE:20261031
SUMMARY:Síntesis de alto nivel (HLS) para FPGAs de AMD con Vitis Unified
DESCRIPTION:Más información e inscripción: https://electratraining.org/2
 026/hls-vitis-unified/
URL:https://electratraining.org/2026/hls-vitis-unified/
END:VEVENT
END:VCALENDAR