Del 17-05-2021 al 01-07-2021
Xilinx MPSoC Advanced Embedded Systems. Incompany Indra
Sistemas Empotrados en Xilinx con MPSoC Zynq UltraScale+ : Advanced Embedded
In company for Indra. Blended course: VILT + face to face.
Curso equivalente a 8 días intensivos (64 hs), organizado a lo largo de 4 semanas (16hs/semana) en el siguiente formato. Donde cada semana:
- 2 sesiones live-online de teoría. 4.5 hs cada una
- 1 día intensivo teórico-práctico presencial de 10.30 a 18.30
Contenido Preliminar del curso MPSoC:
1. Basic contents. Basic notions of embedded design flow and Xilinx architectures
- Overview of Embedded Hardware and software Development
- Embedded UltraFast Design Methodology
- Driving the IP Integrator Tool and the Vitis Software Development Tool
- Zynq-7000 SoC Architecture Overview
- Zynq UltraScale+ MPSoC Architecture Overview
- MicroBlaze Processor Architecture Overview
- AXI: Introduction, Variations and Transactions
- AXI: Connecting AXI IPs
- Creating a New AXI IP with the Wizard
- AXI: BFM Simulation Using Verification IP
- Standalone Software Platform Development and Coding Support
- Using Linker Scripts
- Migrating from SDK to the Vitis Platform
- Introduction to Interrupts and writing Software Interrupts
- Operating Systems: Introduction and Concepts
- Embedded Linux: A High-Level Introduction
- Linux Software Application Development in the Vitis IDE
- Booting Overview
- System Debugger
- Software Profiling Overview
2. Advance contents. In deep MPSoC and Zynq Architecture. Advanced Software features
- Zynq UltraScale+ MPSoC Application Processing Unit: Overview, Cortex-A53 Processor, Architecture Extensions, 64-Bit Architecture Features, Exception Handling, Cache Coherency
- Zynq UltraScale+ MPSoC Real-Time Processing Unit: L1 and L2 Caches, Clocking, Power, and Reset, TCM (Tightly Coupled Memory) Architecture
- Notions of Arm TrustZone Technology: Overview, TrustZone Firmware and Hardware
- QEMU: Introduction, Application Development and Debugging
- Zynq UltraScale+ MPSoC HW-SW Virtualization
- Hypervisors: Introduction, Virtualization Hardware Support, Multiprocessor Software Architecture
- Xen Hypervisor: Introduction, Architecture, Configuration and Use
- OpenAMP: Overview, Framework, Using OpenAMP.
- Linux: Components of an Embedded Linux System, SMP: Introduction, Configuration and Boot
- Driving the PetaLinux Tool. Understanding Device Drivers and Custom Device Drivers in Linux
- Advanced Linux concerns: Yocto Project Overview, Relationship with PetaLinux, Yocto and Open Source Linux (OSL). FreeRTOS: Introduction, Internals, Implementation
- Zynq UltraScale+ MPSoC Software Stack: Introduction, Software Stack
- Zynq UltraScale+ MPSoC PMU (Plattform Management Unit) Introduction
- Power Management: Overview, Power Domains in MPSoC
- Zynq UltraScale+ MPSoC Booting: Boot and Configuration, Boot Image,
- First Stage Boot Loader: Introduction, Debugging, MultiBoot, Secure Booting
3. Specific Contents:
- Moving data efficiently between PS (Processing System) and PL (Programable Logic). AXI Slave, AXI Mater interfaces and AXI-streaming. Using the AXI-Stream DMA IP-core.
- Developing communication with integrated transceivers like Analog Devices AD9361 and High-speed connections using JESD204 protocol. Introduction and general considerations
Fechas:
- S1 : L17, M18 (on-line) a J20 mayo(presc) (Calendario semana 20)
- S2 : M25, X26 (on-line) a J27 mayo(presc) (Calendario semana 21)
- S3 : L14, M15 (on-line) a J17 junio(presc) (Calendario semana 24)
- S4 : L28, M29 (on-line) a J1 julio (presc) (Calendario semana 25)
Lugar de realización:
Escuela Politécnica Superior
Universidad Autónoma de Madrid (UAM)
Francisco Tomás y Valiente, 11
28049 MADRID
Puede ver como llegar (Aquí).
