Del 17-05-2022 al 20-05-2022

Practical Introduction to VHDL at CERN (VILT)

Practical Introduction to VHDL: Logical synthesis and simulation

In-company format exclusively for CERN (Organisation européenne pour la recherche nucléaire – European Organization for Nuclear Research). Genève, Switzerland. Live on Line

Course Objectives:

The course provides the theoretical and practical knowledge that is needed to start developing VHDL designs, placing a special emphasis in Xilinx FPGA devices.

Summary of course contents:

This course provides a detailed introduction to the VHDL language.  Emphasis is on writing solid synthesizable code, and acquiring enough skills on coding for simulation to be able to write appropriate testbenches. Structural, register transfer level (RTL), and behavioral coding styles are covered. This training specifically addresses Xilinx devices, though the acquired skills can be applied to FPGA devices in general. Finally, some basic hints of Verilog are also provided, as well as the fundamentals on how to interface Verilog and VHDL designs.

Skills gained with this training:

After completing this training, you will know how to: Create synthesizable VHDL code, suitable for implementation; Identify the differences between behavioral and structural coding styles; Differentiate coding for synthesis versus coding for simulation; Use scalar and composite data types to represent information; Use concurrent and sequential processes; Understand information flow in RTL representations; Write common VHDL constructs (logical circuits, arithmetic functions, finite state  machines,  RAM/ROM memories); Simulate a basic VHDL design; Write a VHDL testbench and identify simulation-only constructs; Identify and implement coding best practices; Optimize  VHDL  code  to  target  specific silicon resources within Xilinx FPGA devices; Instantiate Verilog modules in VHDL designs and vice versa; Create and manage designs within the Xilinx Vivado Design Suite environment.

Date and Place:

Live-On Line. Using MS-TEAMS.

Tuesday 17th  to Friday 20th of May 2022 8:30 – 12:30.

Profesores a cargo:

  • Gustavo Sutter

    Doctor en informática y telecomunicaciones por la Universidad Autónoma de Madrid, Ingeniero en Sistemas en la Univ. Nacional del Centro de la Prov. de Buenos Aires en Argentina. Cuenta con más de 15 años de experiencia en diseño de sistemas...Leer Más

  • Sergio Lopez-Buedo

    El Dr. Sergio López Buedo, es profesor contratado doctor en el área de Arquitectura y Tecnología de Computadores de la UAM y socio fundador de NAUDIT, una empresa de base tecnológica spin-off de dicha universidad. Tiene más de 15 años...Leer Más